Hack a DELL; LED backlight

By xantus on zondag 21 maart 2010 17:45 - Comments (30)
Category: Weekend projects, Views: 24.093

After I accidentally dropped my DELL Vostro 1400 the screen immediately turned black. This usually means that;
  1. The inverter broke down.
  2. A wire got disconnected.
  3. The CCFL cracked.
Option a is most likely as the heavy flyback transformer of the SMPS tears itself clear of the PCB. But a quick inspection (sadly) shows that in my case it was option c, a cracked CCFL.

Cracked CCFL

A new CCFL (without inverter) would be €30+, which I find quite expensive for a small glass tube. So I decided to replace it by a LED backlight.

http://u1.ipernity.com/14/69/33/7606933.4555192a.240.jpgTo the left is a diagram showing a simplified cross section of a LCD. The left image shows the current CCFL setup. In this setup the CCFL emits light in all directions. Eventually (after bouncing of a few sides) the light will travel through the light guide (blue), bouncing of its side and illumination the screen (red) evenly. The reflection sheet (green) reflects any light lost in the light guide back to the screen.

The LED setup works in almost exactly the same way, only the CCFL is replaced by LEDS.

LED bar

The LCD screen is 14.1”, so it’s a theoretical 31.2cm width. The LEDs I will be using are 2.2mm long and 1.5mm width. The LEDs are arranged in strings of 10. In the end I will use 14 strings, so a total of 140 LEDs.
one LED string
To support the LEDs I cut off one side of IC tube. With some filing the LED will fit snuggly inside the plastic tube, and as a result will be ‘perfectly’ aligned.

LED alignmentThe small strings are soldered alternating plus to plus and minus to minus to form the large string.

After quite some time the bar is finished.Finished LED bar

A quick check showed that the screen lights up ‘nicely’. There is some extra light leakage at the bottom, due to misalignment of some LEDs, but the screen had a reasonable amount of leakage even when it was lit by a CCFL.Initial check

Next it is time to glue the LED bar in place. LED bar placed inside screen

A piece of copper foil is placed of the LEDs to direct the as much of the light into the screen as possible. And finally some pieces of foam are tapped to the back to press the deflector firmly against the light guide, because the loser the deflector the more light leakage you will get at the bottom of the screen.Finished screen

LED driver

Next it is time to connect the LEDs to the CCFL driver. Of course this can’t be done directly, so some modifications have to be made. The picture below shows the CCFL driver in its original form. In green is a MP1255 (WP1255?), this is either a SMbus controller or a tri-state buffer. In blue is a WP1016, this is a CCFL driver :). In red is the flyback. CCFL driver

Outlined in blue is the PWM signal that controls the brightness of the backlight. WP1016

The PWM signal can be reused, the rest sadly not. As LED driver I used a LT1373 set to 35V.LED driver
  • L1 47uH, 1.3A peak current
  • D1 SS16, ultra fast schottky diode
  • C1 25uF
  • C2 10nF
  • C4 4uF, low ESR capacitor
  • R1 470kΩ
  • R2 17k6Ω
  • R3 4k7Ω
LED driverAlso each string of 10 LEDs has a 330Ω resistor in serie to limit the current.


And finally some pictures of the result.
The end result is a little yellower than with a CCFL backlight.http://u1.ipernity.com/14/73/75/7607375.7261bda6.560.jpg

7 Segment Displays

By xantus on vrijdag 5 maart 2010 04:25 - Comments are closed
Category: Verilog examples, Views: 11.996

An easy way to add debug capabilities to your project is by using the 7-segment displays. The following piece of verilog code shows you how to control the 4 multiplexed common-cathode displays. The digitx inputs are BCD. The fifth bit (digitx[4]) is for blanking the digit (1=off, 0=on).

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VGA timing

By xantus on donderdag 4 maart 2010 07:43 - Comments (1)
Category: Verilog examples, Views: 9.726

Figure 1 illustrates the basic timing requirements for each row (horizontal) that is displayed on a VGA monitor. An active-low pulse of specific duration (time a in the figure) is applied to the horizontal synchronization (hsync) input of the monitor, which signifies the end of one row of data and the start of the next. The data (RGB) input on the monitor must be driven low for a time period called the back porch (b) after the hsync pulse occurs, which is followed by the display interval (c).

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Rotary Encoder

By xantus on maandag 1 maart 2010 20:24 - Comments are closed
Category: Verilog examples, Views: 6.378

The following code is for a rotary encoder with 2-bit gray code output. It has an 8-bit output which increases/decreases by rotating the rotary encoder

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PS/2 Keyboard Communication

By xantus on donderdag 18 februari 2010 13:41 - Comments (1)
Category: Verilog examples, Views: 16.503

PS/2 keyboard communication is actually a very simply protocol too implement on a FPGA. The clock is provided by the keyboard and the data is sent in 11-bit frames. The frame-bits are:
  • 1 start bit; always 0
  • 8 data bits (LSB first)
  • 1 parity bit (odd parity)
  • 1 stop bit; always 1

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